Battery operated devices typically have some type of power management in order to conserve the battery power and extend the length of operation of the device before having to re-charge the batteries or otherwise replace the drained batteries with fresh batteries.
For example, battery operated devices that include complimentary metal oxide semiconductor (CMOS) circuits can reduce battery drain during periods of inactivity by stopping the system clock signal that is provided to the CMOS integrated circuits (also commonly referred to as “chips”). Stopping the clock reduces power consumption without losing the state of the chip. The state is simply the current information when the clock is stopped that is needed to resume the current processes and operation of the chips when the clock is re-started.
When activity resumes (e.g., when a user begins to provide input signals), the operation of the chips resumes by simply starting the clock. Traditionally, with CMOS manufacturing processes that feature a gate length of about one micron, the current draw due to leakage (i.e., the leakage current) when the clock is stopped is very low (e.g., about one nano amperes). This low leakage current is tolerable for many portable applications that use battery power.
With the advent of more complex circuits that require increased circuit densities, and the need for faster processing speeds, a trend in semiconductor manufacturing is to decrease the gate lengths to sub-micron levels. For example, 0.25 micron CMOS processes and 0.18 micron CMOS processes provide increased circuit densities and faster processing speeds.
Unfortunately, one trade-off for the increased speed and increased circuit density is that these processes typically have a much higher leakage current of about 10 micro amperes when the clocks are stopped than the processes with gate lengths greater than one micron.
Consider the situation where a user leaves the device inactive for a day. When the user returns to the device, the device is completely drained of battery power because of the high leakage current. The battery drain occurs even though the device was not used at all during the period of inactivity, and the device was is sleep mode during the period of inactivity. It is evident that such a situation is unacceptable to the user.
Consequently, for circuits that are manufacture with these sub-micron processes, it is no longer sufficient to simply stop the clock. Instead, the chips must be completely disconnected from the power supply in order to conserve power. When the chips are completely disconnected from the power supply, there is no leakage current, thereby saving power. However, before disconnecting the power, it is important that the state information of the chips first be saved to a storage that can store the state information even when the power is disconnected. One reason for saving the state information is to meet an expectation of users. Upon return to the device, users expect to find the same applications and data files present that were present when the user last used the device. In this regard, when the period of inactivity is ended, it is desirable for the device to use the state information to automatically restore the state of the device prior to the period of inactivity.
Otherwise, a user would have to manually restore the device to the state that existed prior to the period of inactivity. For example, a user would have to 1) manually power-up the device, 2) wait for the hardware and software of the device to re-boot, 3) remember the applications that were opened, 4) manually open each of these applications, 5) remember the data files that were opened, and 6) manually open each of the data files. As can be appreciated, this manual approach is tedious, time-consuming, inefficient, and generally unacceptable to most users.
One prior art approach to save and restore state information involves using special software that performs the following steps. First, special software is executed by an operating system to save state information to a memory. A period of inactivity follows. Second, when activity resumes, a hardware reboot and a software reboot are performed as if the device is being powered up for the first time. Third, special software instructions are executed by the operating system to restore the previously saved state information to the chips of the device.
As can be appreciated, this software-based approach is tedious, time consuming, and may fail to meet a user's expectation of a speedy and almost instantaneous return to the state of the device as the user had last left. This approach provides a response time that is almost as slow as the response of the device being turned on from a completely off state.
Consequently, it is desirable for there to be a mechanism that quickly and efficiently saves state information without requiring the execution of special software instructions by an operating system. Furthermore, it is desirable for there to be a mechanism that quickly and efficiently restores state information to the chips of the device without requiring a hardware reboot, a software reboot, and the execution of special software instructions by an operating system.
Based on the foregoing, there remains a need for a state save and restore method and system for inactive state power reduction that overcomes the disadvantages set forth previously.